Costa P. Gerousis,  Ph.D
Assistant Professor

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TEACHING - FALL 08

CPEN214: Digital Logic Design
CPEN315: Digital and Computer System Design
CPEN315L: Digital and Computer System Design lab
PHYS152: Intermediate Physics II

CPSC110: Introduction to Computing - WebCT (S06)
PHYS202: General Physics II (S06, S07)
PHYS202L: General Physics II Lab (S06)
PHYS201: General Physics I  (F04)
PHYS151: Intermediate Physics (F05)
CPEN499: Computer Engineering Capstone Project (S04)
CPEN214: Digital Logic Design (F03-F07)
CPEN315: Digital Systems (S04, S07, S08)
CPEN315L: Digital Systems Lab (S04, S07, S08)
ULLC100: FYS, Evolution of Wired Life (F06, F07)
CPSC330: Computer Organizations (F04-F07)

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OFFICE HOURS - Spring 08

M: 11:00 am – 12:00 pm 
R:  11:00 am – 12:00 pm 
F:  11:00 am – 12:00 pm 
and by appointment only.

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RESEARCH

Single-Electron Device, Nanoelectronic Cellular Neural Networks (CNNs), Hybrid  MOS-SET circuits, Nanotechnology

Several emerging nanoscale device replacements for bulk-effect semiconductor transistor have been suggested to overcome the problems accompanied by scaling.  Among the new devices is the single electron tunneling (SET) transistor that offers attractive features such as reduced dimensions, high integration density, and low power consumption.  My research investigates the use of SETs for potential application in future high density and low power networks.

Selected Publications

• S. M. Goodnick, C. Gerousis, R. Archibald, R. A. Kiehl, and F. Hoppenstaedt, “Cellular Single-Electron Transistor Circuits and Architectures.” Conference on Nanoscale Devices and System Integration, April 5, 2005.
• C. Gerousis, S. M. Goodnick, W. Porod, “Nanoelectronic Single-electron Transistor Circuits and Architectures,” International Journal of Circuit Theory and Applications, vol. 32, pp. 323-538, 2004.
• C. Gerousis, S.M. Goodnick,  IEEE Si Nanoelectronics Workshop,  "Single-Electron Transistor Circuits and Cellular Nonlinear Networks", June 13-14, 2004, Honolulu, Hawaii.

• C. Gerousis, S.M. Goodnick, W. Porod,  2^nd International Workshop on Quantum Dots for Quantum Computing and Classical Size Effect Circuit (IWQDDC-2), University of Notre Dame, Indiana, 2003

• C. Gerousis and S. M. Goodnick “Simulation of Single-Electron Tunneling Circuits,” Physica Status Solidi, vol. 233, no. 1, 2002.

• C. Gerousis, S. M. Goodnick, W. Porod, A. I. Csurgay, “High-Speed and Low-Power Cellular Neural Networks Using Single-Electron Tunneling Technology.” Proceedings of IEEE International Symposium on Circuits and Systems, Part 2, II-45-48, 2002.

• D. K. Ferry, M. Koury, C. Gerousis, M. J. Rack, A. Gunther, S. M. Goodnick, “Single-electron charging effects in Si MOS devices,” Physica E, vol. 9, pp. 69-75, 2001.