Christopher Newport University
Department of Physics, Computer Science & Engineering
1 University Place, Newport News, VA 23606 USA
|gerousis||@||pcs.cnu.edu||| (757) 594-7603 | fax: (757) 594-7919|
TEACHING - Fall 09
Honor Seminar (material on Blackboard)
PHYS151: Intermediate Physics I (material on Blackboard)
CPEN214: Digital Logic Design
CPSC330: Computer Organizations and Design (material on Blackboard)
TEACHING - Spring 09
TEACHING - Fall 08ULLC100: First Year Seminar
CPSC110: Introduction to Computing -
PHYS202: General Physics II (SP06, S07)
PHYS202L: General Physics II Lab (S06)
PHYS201: General Physics I (F04)
PHYS151: Intermediate Physics (F05)
CPEN499: Computer Engineering Capstone Project (SP04)
CPEN214: Digital Logic Design (F03-F07)
CPEN315: Digital Systems (S04, S07, S08)
CPEN315L: Digital Systems Lab (SP04, SP07, SP08)
ULLC100: FYS, Evolution of Wired Life (F06, F07)
CPSC330: Computer Organizations (F04-F07)
M: 12:00 pm – 1:30 pm
W: 1:00 pm – 2:30 pm
R: 1:00 pm – 2:00 pm
F: 1:00 pm – 2:00 pm
And by appointment only.
Nanotechnology , Single-Electron Device, Nanoelectronic Cellular Neural Networks (CNNs), Hybrid MOS-SET circuits.
Several emerging nanoscale device replacements for bulk-effect semiconductor transistor have been suggested to overcome the problems accompanied by scaling. Among the new devices is the single electron tunneling (SET) transistor that offers attractive features such as reduced dimensions, high integration density, and low power consumption. My research investigates the use of SETs for potential application in future high density and low power networks.
C. Gerousis, S.M. Goodnick, W. Porod, 2nd International Workshop on Quantum Dots for Quantum Computing and Classical Size Effect Circuit (IWQDDC-2), University of Notre Dame, Indiana, 2003
C. Gerousis and S. M. Goodnick “Simulation of Single-Electron Tunneling Circuits,” Physica Status Solidi, vol. 233, no. 1, 2002.
C. Gerousis, S. M. Goodnick, W. Porod, A. I. Csurgay, “High-Speed and Low-Power Cellular Neural Networks Using Single-Electron Tunneling Technology.” Proceedings of IEEE International Symposium on Circuits and Systems, Part 2, II-45-48, 2002.
D. K. Ferry, M. Koury, C. Gerousis, M. J. Rack, A. Gunther, S. M. Goodnick, “Single-electron charging effects in Si MOS devices,” Physica E, vol. 9, pp. 69-75, 2001.