CAM 2 Specifications
CNU's First Customized Transistor Layout Design.
schematic capture -> verilog simulation -> floorplan place & route -> final layout
transistor design -> spice simulation -> transistor layout
Memory Size: 4 words x 2 x 8 bits
Physical Size: 2.51mm x 2.29mm -> 5.75 sq mm
Technology: 1.2 micron
2 layer metal
cmosn library
Transistor Count: 2637 (double CAM 1 capacity with 18% fewer transistors)
Pin Count: Data 16
Address 2
Opcode 3
Clock 2
Enable 2
Mode 1
Reset 1
Chip Select 1
Output Ready 1
VDD 2
VSS 2
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Total 33